Chipinsight product may be used for number of applications. - OPC/Design Verification on a critical IC region using wafer print contours, on a single layer with one or more contour thresholds
- PV Band generation for multiple Focus/Exposure settings using wafer print contours
- Evaluation of feature signal edge and sidewall angle variability
- OPC/Design Verification on a full-chip layer
- OPC/Design Verification on multi-layers, including intra-layer overlap performance, for example to analyze contact layer overlap with the trench layer
- Pattern performance across die – compare the patterning performance/differences of multiple instances of the same structure
- End-to-end pattern transfer performance – design, opc, mask, and wafer especially for those with captive mask shops
- Simulation calibration
- Improve current OPC models using accurate 2D wafer contour information
Future Applications:- Study stepper induced across-die/across-chip effects
- Study across-wafer/multiple die long-range stepper-induced effects
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